Catalog Entry (2009-2010):

4360 Computer Design II(4) A comprehensive study of the peripherals for a high speed microcomputer system. The emphasis is on direct memory access (DMA) controllers, interrupt controllers, dynamic RAM hardware interfacing and programmable logic devices (PLD). Prereq: CEEN 4330/8336, STAT 3800. Pre- or co-req: CSCI 4500.(Cross-listed with CEEN 8366, CEEN 8376.)

Text:

Microprocessors Architecture, Programming and Interfacing, Barry Brey, Merrill Publishing.
Data Communications, Driscoll, Saunders College Publishing

Course Outcomes:

The student who successfully completes this course can:

1. Explain an RS-232 type serial communication protocol for a microcomputer system. (4,5)
2. Design and incorporate serial communications ports for a microprocessor system. (3, 4, 5, 7, 9defhi)
3. Explain the theory and operation of Direct Memory Access (DMA) Controller devices in a microcomputer system. (3, 4, 7)
4. Design, build, and debug Direct Memory Access Controller devices for a microprocessor system. (3, 4, 5, 7, 8, 9defhi)
5. Write the operating software to perform system memory monitoring in C/C++ for the designed microcomputer system.(7, 8)
6. Understand the concepts of multiprocessors, Dynamic RAM, multibusses, Cache memory, pipelining, and interconnection networks in parallel processors. (3, 4, 9defhi)
7. Generate engineering report including the schematic, programs listing, and the required decoding logic. (13, 15)

Course Topics:

1. Serial Data Communications, 
   1. Asynchronous/Synchronous Transmissions
   2. Data Transmission Format
   3. Baud Rate Computations
   4. Clock Requirements
   5. Hardware Design with USARTs
   6. Software Monitoring Design
2. MultiBus Interfacing
   1. Direct Memory Access (DMA)
   2. Basic Operation of DMA
   3. Different DMA Transfer Modes
   4. Typical DMA Control Signals
   5. Performance Improvement under DMA
   6. DMA Controller
   7. Controller Initializations
   8. System Throughput Evaluation with DMA Controller
   9. System Design with DMA
   10. Memory Interfacing Design with DMA Controller
   11. I/O Interfacing Design with DMA Controller
3. Dynamic Random Access Memory (DRAM) architecture and interfacing
   1. Description of a Dynamic Memory Cell
   2. Control Signals for a DRAM Cell, Memory Refreshing Techniques
   3. Design with DRAM in a Microprocessor Based System
4. Memory System Design, Associative Memory, Cache Memory, Virtual Memory
5. Pipeline Architecture, Interconnection Network.

Laboratory Projects:

Expansion of Computer Design I project with:

1. Write the operating system for the project in C/C++
2. Design and implement an Interrupt system for the keyboard controller
3. Design and implement a USART interfacing to support an asynchronous serial data transmission between the project and a null terminal.
4. Design and implement a DMA controller for the project to provide memory to memory, I/O to memory, and memory to I/O data transfer using DMA only.
5. Design and evaluate a pipeline architecture.
6. Formal Report is required for every lab.

Prepared by:

Hamid Sharif - February 2001